1. Field of the Invention
The present invention generally relates to MOSFET (Metal Oxide Semiconductor Field Effect Transistor) devices, and more particularly to ESD (Electrostatic Discharge) robust current mirror devices.
2. Background Description
In BiCMOS (Bipolar/Complementary Metal Oxide Semiconductor) or radio frequency (RF) CMOS applications used for optical interconnects, current sources may appear on the output pad to drive internal current loads. For example, in one application output pins exist where a small MOSFET (Metal Oxide Semiconductor Field Effect Transistor) device drain is connected to a pad, the MOSFET device source is connected to ground and its gate is connected to another pad. The gate connection is also connected to a set of other MOSFET devices whose gates are connected to the output MOSFET device. An internal current mirror circuit is set so that the internal mirror elements are also set so the gate node of the current mirror is connected to one of the MOSFET device""s drain as well.
The uniqueness of the current mirror device on an output node is that it is difficult to protect for ESD (Electrostatic Discharge) or overvoltage. As the gate node rises, the gates of the MOSFET devices are driven high, turning the MOSFET devices on. The direct coupling of the MOSFET device gates used for the current mirror acts as a MOSFET trigger. In this case, with the current mirror connection between drain and gate of the MOSFET device, the MOSFET device turns on at a much earlier voltage than the MOSFET avalanche voltage value. This circuit is then difficult to ESD protect and does not allow protection networks adequately provide protection to the MOSFET device. In the case that the MOSFET device is large (e.g., W xc3xa2‰¥1000 {circumflex over (1)}xc2xc m, where W is the gate width), turning on the MOSFET device would be an advantage. But in the case of small elements (e.g., W greater than 100 {circumflex over (1)}xc2xc m), this is a disadvantage causing difficulty to protect this circuit.
Summary of the Invention
It is therefore an object of the present invention to provide new ESD robust current mirror circuits.
According to the invention, as a first embodiment of the invention, the current mirror circuit has a means of decoupling the gate when the chip is unpowered. This is achievable by a circuit or element which, when the circuit is in an unpowered state, decouples the gate node from the drain of the MOSFET device. As the chip is powered, this circuit or element is xe2x80x9conxe2x80x9d providing the gate coupling between the drain and the gate node. This xe2x80x9ccurrent mirror gate disable networkxe2x80x9d can be as simple as a MOSFET device whose source and drain are in series with the gate-to-drain connection of the current mirror device, a zero voltage threshold element, power-on reset function with some logic gates. Note that this xe2x80x9cswitchxe2x80x9d may have to be mirrored into the other end of the current mirror to establish the symmetry between the outboard and inboard current mirror sides. Another embodiment can be an element that is switched off with a parallel element (a set of diodes) to allow current flow in the current mirror element after some set voltage level to provide gate coupling after some set voltage levels.
A second embodiment of the invention provides protection by adding a second element which provides de-biasing preventing a Vgs (gate-to-source voltage) from being established. This can be done by having a second element in series which allows the source of the MOSFET device to rise preventing establishment of the Vgs potential that exceeds the Vt (threshold voltage) of the device. The current flow through the second series element from the over voltage ESD pulse provides the rise of the source. An auxiliary element sources current to the de-biasing element. For example, the gate current can flow to the element below the MOSFET device current mirror element. If for example it is a resistor, the current will bypass the MOSFET device and flow to the resistor, allowing the source to rise. This de-biases the current mirror. This can also be done by a diode element connected to VDD (source voltage) or a rail which is attached to the gate of a second element (such as a PFET or p-type FET) which turns off, forcing the source to de-couple from ground potential, allowing de-biasing of the network. Hence, the current mirror de-biasing element can cause the current mirror MOSFET device to turn off during over voltage.
In a third embodiment of the invention, an element is used between the gate and the ground potential on the current mirror MOSFET gate node to allow current to flow to ground. This element prevents the gate node from the current mirror to rise too high and allows the current to be discharged through the element instead of the current mirror MOSFET device. This can be established by a second MOSFET device that is large and that is xe2x80x9coffxe2x80x9d during function mode and xe2x80x9conxe2x80x9d during ESD. This can be established by a diode string between the current mirror node to the ground potential.